NXP Semiconductors /MIMXRT1062 /IOMUXC /SW_MUX_CTL_PAD_GPIO_EMC_34

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SW_MUX_CTL_PAD_GPIO_EMC_34

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALT0)MUX_MODE 0 (DISABLED)SION

MUX_MODE=ALT0, SION=DISABLED

Description

SW_MUX_CTL_PAD_GPIO_EMC_34 SW MUX Control Register

Fields

MUX_MODE

MUX Mode Select Field.

0 (ALT0): Select mux mode: ALT0 mux port: SEMC_DATA12 of instance: semc

1 (ALT1): Select mux mode: ALT1 mux port: FLEXPWM3_PWMB02 of instance: flexpwm3

2 (ALT2): Select mux mode: ALT2 mux port: USDHC1_VSELECT of instance: usdhc1

3 (ALT3): Select mux mode: ALT3 mux port: SAI3_RX_SYNC of instance: sai3

4 (ALT4): Select mux mode: ALT4 mux port: CSI_DATA19 of instance: csi

5 (ALT5): Select mux mode: ALT5 mux port: GPIO3_IO20 of instance: gpio3

8 (ALT8): Select mux mode: ALT8 mux port: ENET2_RX_ER of instance: enet2

SION

Software Input On Field.

0 (DISABLED): Input Path is determined by functionality

1 (ENABLED): Force input path of pad GPIO_EMC_34

Links

() ()